ChiMei Building 6F R95611
Professor Gwo Giun (Chris) Lee
Address
Email
TEL
+886-6-2757575 ext.62448
Lab Weblink
Media System-on-a-Chip Laboratory
(R95613/ext.62400-2850)
Background
Educations
Ph.D., University of Massachusetts, U.S.A.
M.S., University of Massachusetts, U.S.A.
B.S., National Taiwan University, R. O. C.
Experiences
2012-present
Professor, Department of Electrical Engineering, National Cheng Kung University, R. O. C.
2010-present
Associate Editor in Journal of Signal Processing Systems (JSPS)
2014-2017
Associate Editor of IEEE Transactions on Signal Processing (TSP)
2013-2015
Adhoc Chair of ISO/IEC ITU 3D Video Coding Technology
2011-2015
Director of International Relation Division, National Cheng Kung University
Chief Editor in Reconfigurable Video Coding, MPEG meeting (RVC group)
2009-2014
Associate Editor in IEEE Transactions on Circuits and Systems for Video Technology (TCSVT)
2008-2012
Associate Professor, Department of Electrical Engineering, National Cheng Kung University, R. O. C.
2007-2007
Swiss Federal Institute of Technology (Ecole Polytechnique Federal de Lausanne), EPFL, Visiting Professor
2003-2008
Assistant Professor, Department of Electrical Engineering, National Cheng Kung University, R. O. C.
2003-2003
Director, Quanta Research Institute, R. O. C.
2002-2003
DSP Architect, Micrel Semiconductors, U.S.A.
1999-2002
System Architect, (DTV/TriMedia Group , Philips Semiconductors), U.S.A.
1997-1999
Member of Technical Staff, Stream Machine, U.S.A.
Specialities
- Multimedia Digital Signal Processing Algorithms, Architecture, and VLSI Design
- SoC Integration and Design Methodology
- Intelligent Signal Processing
Publication
Journal
more
less
- K.-C. Chen, W.-H. Peng, G. G. C. Lee, “Overview of Intelligent Signal Processing Systems,” APSIPA Transactions on Signal Information Processing, Vol. 12, Issue 1, Sept. 2023.
- J.-I. Lee, Y.-Y. Fang, N.-Y. Wu, C.-I Chang, M.-C. Huang, C.-Y. Lee, J.-Y. Huang, G. G. C. Lee, C.-S. Chen, “Effect of a novel telehealth device for dietary cognitive behavioral intervention in overweight or obesity care,” Science Report 13, 6441, Mar., 2023.
- Gwo Giun (Chris) Lee, Te-Han Kung, Tzu-Cheng Chao, Yi-Ru Xie, Ming-Chyi Pai, Yu-Min Kuo, "Neuroimage biomarker identification of the conversion of mild cognitive impairment to Alzheimer's Disease." Frontiers in Neuroscience 15 (2021).
Conference
more
less
- Lee, W. C., Lee, G. G. C., Yang, C.-C, "Sparse Basis Approach for Lightweight AI System Design," Proc. 2024 IEEE ICEIC, Jan., 2024.
- Y.-W. Wang, G. G. C. Lee, Y.-H., Chen, S.-Y., Chen, "Implementation of Gabor Filter Based Convolution for Deep Learning on FPGA," 2022 IEEE RASSE, Tainan, Taiwan, Nov., 2022.
- Y-H. Chang, G. G. C. Lee, S.-Y, Chen, “Deep Learning Acceleration Design Based on Low Rank Approximation,” Proc. of 2022 APSIPA ASC, Chiang Mai, Thailand, November 2022.
Patent
more
less
- G. G. Lee, T.-H. Kung, T.-C. Chao, Y.-M. Kuo, M.-R. Tsai, "Biomarker for early detection of Alzheimer Disease," US Patent US11,712,192B2, Aug. 1, 2023.
- G. G. Lee, Z.-H. Yu, S.-Y. Chen,” Convolution neural network and associated method for identifying basal cell carcinoma,” US Patent 11538158, Dec. 27, 2022.
- 李國君、王聿泰、葉昌偉, 用於影像分析之卷積神經網路方法及其系統, 2022年二月, 中華民國專利 I755141
Others
more
less
- G. G. Lee, C. F. Chen, and Taiping Wang, “Algorithm/Architecture Codesign: From System on Chip to Internet of Things and Cloud,” Smart Sensors and Systems, Springer pp. 135-154, June. 2020.
- Gwo Giun Lee, He-Yuan Lin and Sun-Yuan Kung, "Algorithm/Architecture Co-Exploration." in Multimedia Image and Video Processing, Second Edition, ed: CRC Press, 2012, pp. 573-608.
- Authoring "Visual Signal Processing: Algorithm, Architecture and VLSI Design" with Prof. Marco Mattavelli of Ecole Polytechnique Federale de Lausanne (EPFL), Switzerland. Invitation from Springer Publisher with expected publication.
Projects
- Lightweight Intelligent Edge Storage (2022.08.01 - 2023.07.31)
- Reconfigurable Edge via Machine Learning Based Analytics Architecture (2020.08.01 - 2022.07.31)
- Reconfigurable edge based on parsing architecture (2019.08.01 - 2020.07.31)
- Outstanding Innovative Research, "Harmonics-based in vivo optical virtual biopsy, " (2013.01.01 - 2016,12.31)
- Medical Image Analytics for Computer-Aided Diagnosis System via Deep Learning Algorithm/Architecture Co-Exploration (2015.08.01 - 2018.07.31)
- Intelligent/Cognitive System Automation Design Methodology from Information and Communication Technology(ICT) to Internet of Things(IoT) (2014.08.01 - 2015.07.31)
- Design of an Intelligent Digital SoC for Vital-Sign Detection and Physiological Signal Processing in Health Monitoring Systems(3/3) (2013.05.01 - 2014.07.31)
- Design of an Intelligent Digital SoC for Vital-Sign Detection and Physiological Signal Processing in Health Monitoring Systems(2/3) (2012.05.01 - 2013.04.30)
- Algorithm/Architecture Co-exploration for Advanced Visual Signal Processing (2011.08.01 - 2014.07.31)
- Design of an Intelligent Digital SoC for Vital-Sign Detection and Physiological Signal Processing in Health Monitoring Systems(1/3) (2011.05.01 - 2012.04.30)
- Advanced Reconfigurable Video Coding in Digital Home(3/3) (2010.08.01 - 2011.07.31)
- Algorithm/Architecture Co-design of Multi-format SoC System Architecture in Advanced ESL Design Methodology for Nanotechnology(3/3) (2009.08.01 - 2010.07.31)
- Advanced Reconfigurable Video Coding in Digital Home(2/3) (2009.08.01 - 2010.07.31)
- Algorithm/Architecture Co-design of Multi-format SoC System Architecture in Advanced ESL Design Methodology for Nanotechnology(2/3) (2008.08.01 - 2009.07.31)
- Advanced Reconfigurable Video Coding in Digital Home(1/3) (2008.08.01 - 2009.07.31)
- Algorithm/Architecture Co-design of Multi-format SoC System Architecture in Advanced ESL Design Methodology for Nanotechnology(1/3) (2007.08.01 - 2008.07.31)
- Advanced Electronic System Level Research and Design for High Definition Video Frame Rate Conversion (2006.08.01 - 2007.07.31)
- On the Research of Digital Image and Video Processing's Algorithm/Architecture Co-Design for Next Generation Portable Devices (2005.08.01 - 2006.07.31)
- SoC Testing Platform Design & Automation-Subproject 2: The Design & Testing of Multimedia SIP in SoC (2004.08.01 - 2007.07.31)
- Motion Compensated Deinterlacing Algorithm and VLSI Architecture Design (2004.08.01 - 2005.07.31)
- System Verification Methodology for HDTV SoC (2004.02.01 - 2004.10.31)
- Research and Implementation on Advanced Multimedia Techniques for Human-Centric Digital Life (HCDL)(3/3) (2008.12 - 2009.11)
- Research and Implementation on Advanced Multimedia Techniques for Human-Centric Digital Life (HCDL)(2/3) (2007.12 - 2008.11)
- Research and Implementation on Advanced Multimedia Techniques for Human-Centric Digital Life (HCDL)(1/3) (2006.12 - 2007.11)
- IPs Collection and Verification for System-on-Chip Design(3/3) (2006.04.01 - 2007.03.31)
- IPs Collection and Verification for System-on-Chip Design(2/3) (2005.04.01 - 2006.03.31)
- IPs Collection and Verification for System-on-Chip Design(1/3) (2004.04.01 - 2005.03.31)
- Promotion on VLSI circuit/system education, Consortium development of Project (2004.03.01 - 2004.12.31)
- Promotion on VLSI circuit/system education, Ministry of eduction (2004.03.01 - 2004.12.31)
Classes
2018 Spring
2017 Spring
Students
Current Academic Year Lab Members
Ph.D. Student
Chun-Fu Chen
M.S. Student
Shih-Yu Chen
Chin-Wei Huang
Yi-Ru Xie
Jia-Hong Chen
Ying-Qi Cai
Guan-Wei Huang
Cheng-Han Song
Meng-Ru Cai
Zong-Lin Cai
Yuan-Dong Huang
Yu-Hsuan Chen
Yu-Cheng Chen
Yu-Ting Wu
Po-Ru Pan
Graduates of all Previous Years
Ph.D. Student
98
He-Yuan Lin
101
Ming-Jiun Wang
M.S. Student
93
Sheng-Ta Chiang
94
Hsin-Te Li   Bau-Jin Tong   Wei-Chi Su   Chih-Wen Jhuo
95
Yuan-Ching Chen   Yi-Chung Tsai   Bo-Yun Lin   Cheng-Liang Wang   Hsien-Po Huang
96
Rong-Lai Lai
97
Bo-Han Chen   Yu-Han Chen   Wei-Chiao Yang   Yuan-Long Zheng
98
Yen-Long Hsieh   Tsung-Yuan Huang   Jia-Wei Liang
99
Nien Hsiu Yen   Ling-Fei Wei   Ching-Jui Hsiao   Jui-Che Wu
100
I-Shuo Chen   Huan-HSiang Lin   Shu-Ming Xu   Qiao-Xiang Xiao
101
Yi-Siou Chen   Yen-Yu Shen   Jhu-Syuan Ho   Jhen-Yue Hu
102
Bo-Syun Li
103
Cheng-Shiun Tsai   Yi-Hsuan Chou
104
Chun-Hsi Huang
105
Zuo-Jheng Huang   Zheng-Han Yu   Shi-Yu Hung   Chih-Yuan Chen   Hsiang-Lin Wang   Jian-Jhih Huang
106
Kuan-Wei Huang   Kai-Xuan Hong   Po-Wei Huang   Cheng-Hsien Li
107
Te-Han Kung   Yu-Yi Chou   Yu-Han Huang   Sian-Pin Jhu
Honors
- IEEE Transactions on Circuits and Systems for Video Technology, Best Associate Editor Award
- IEEE Region10 Executive Committee Member
- Motion Picture Expert Group (MPEG) Delegate
- Chief Editor for Reconfigurable Video Coding Ad Hoc Group in MPEG
- Ad Hoc Chair for Complexity Assessment Ad Hoc Group in ISO/IEC/ITU/MPEG
- Chair for Visual Signal Processing and Communications Track in ISCAS
- Chair for Signal Processing System Track in APSIPA
- Review Committee Member for Visual Signal Processing and Communications Track, the 2008 IEEE International Symposium on Circuits and Systems. (May 18-21, Seattle, USA)
- Review Committee Member for Visual Signal Processing and Communications Track, the 2007 IEEE International Symposium on Circuits and Systems. (May 27-30, New Orleans, USA)
- Review Committee Member for Multimedia Systems Application Track, the 2007 IEEE International Symposium on Circuits and Systems. (May 27-30, 2007, New Orleans, USA)
- Co-Chair for Visual Signal Processing and Communications Track, the 2006 IEEE International Symposium on Circuits and Systems. (May 21-24, Island of Kos, Greece)
- Review Committee Member for Visual Signal Processing and Communications Track, the 2006 IEEE International Symposium on Circuits and Systems. (May 21-24, Island of Kos, Greece)
- Review Committee Member for Multimedia Systems Application Track, the 2006 IEEE International Symposium on Circuits and Systems. (May 21-24, 2006, Island of Kos, Greece)
- Review Committee Member for Visual Signal Processing and Communications Track, the 2005 IEEE International Symposium on Circuits and Systems. (May 23-26, 2005, Kobe, Japan)
- Review Committee Member for Visual Signal Processing and Communications Track, the 2004 IEEE International Symposium on Circuits and Systems. (May 23-26, 2004, Vancouver, Canada)
- Technical Committee Member for Visual Signal Processing and Communications & Multimedia Systems Application Tracks for IEEE International Symposium on Circuits and Systems
- Distinguished Doctoral Dissertation Award for the Year 1998, University of Massachusetts